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    Author information
    First name: Andreas
    Last name: Sembrant
    DBLP: 115/4866
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    Below you find the publications which have been written by this author.

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    Conference paper
    Gustaf Borgström, Andreas Sembrant, David Black-Schaffer.
    Adaptive Cache Warming for Faster Simulations.
    Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO 2017, Stockholm, Sweden, January 23-25, 2017 2017 (0) 2017
    Conference paper
    Andreas Sembrant, Erik Hagersten, David Black-Schaffer.
    A Split Cache Hierarchy for Enabling Data-Oriented Optimizations.
    2017 IEEE International Symposium on High Performance Computer Architecture, HPCA 2017, Austin, TX, USA, February 4-8, 2017 2017 (0) 2017
    Conference paper
    Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer.
    POSTER: Putting the G back into GPU/CPU Systems Research.
    26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017, Portland, OR, USA, September 9-13, 2017 2017 (0) 2017
    Conference paper
    Andreas Sembrant, Erik Hagersten, David Black-Schaffer.
    Data placement across the cache hierarchy: Minimizing data movement with reuse-aware placement.
    34th IEEE International Conference on Computer Design, ICCD 2016, Scottsdale, AZ, USA, October 2-5, 2016 2016 (0) 2016
    Conference paper
    Arthur Perais, André Seznec, Pierre Michaud, Andreas Sembrant, Erik Hagersten.
    Cost-effective speculative scheduling in high performance processors.
    Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015 2015 (0) 2015
    Conference paper
    Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, André Seznec, Pierre Michaud.
    Long term parking (LTP): criticality-aware resource allocation in OOO processors.
    Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015 2015 (0) 2015
    Conference paper
    Andreas Sembrant, Erik Hagersten, David Black-Schaffer.
    Navigating the cache hierarchy with a single lookup.
    ACM/IEEE 41st International Symposium on Computer Architecture, ISCA 2014, Minneapolis, MN, USA, June 14-18, 2014 2014 (0) 2014
    Conference paper
    Andreas Sandberg, Andreas Sembrant, Erik Hagersten, David Black-Schaffer.
    Modeling performance variation due to cache sharing.
    19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013 2013 (0) 2013
    Conference paper
    Andreas Sembrant, Erik Hagersten, David Black-Schaffer.
    TLC: a tag-less cache for reducing dynamic first level cache energy.
    The 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, Davis, CA, USA, December 7-11, 2013 2013 (0) 2013
    Conference paper
    Andreas Sembrant, David Black-Schaffer, Erik Hagersten.
    Phase guided profiling for fast cache modeling.
    10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2012, San Jose, CA, USA, March 31 - April 04, 2012 2012 (0) 2012
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