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    Author information
    First name: Teijo
    Last name: Lehtonen
    DBLP: 25/1636
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    Journal article
    Ville Rantala, Teijo Lehtonen, Pasi Liljeberg, Juha Plosila.
    Analysis of Monitoring Structures for Network-on-Chip: A Distributed Approach.
    IJERTCS 2011, Volume 2 (0) 2011
    Conference paper
    Ville Rantala, Teijo Lehtonen, Pasi Liljeberg, Juha Plosila.
    Analysis of Status Data Update in Dynamically Clustered Network-on-chip Monitoring.
    PECCS 2011 - Proceedings of the 1st International Conference on Pervasive and Embedded Computing and Communication Systems, Vilamoura, Algarve, Portugal, 5-7 March, 2011 2011 (0) 2011
    Journal article
    Teijo Lehtonen, David H. Wolpert, Pasi Liljeberg, Juha Plosila, Paul Ampadu.
    Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects.
    IEEE Trans. VLSI Syst. 2010, Volume 18 (0) 2010
    Journal article
    Ethiopia Nigussie, Teijo Lehtonen, Sampo Tuuna, Juha Plosila, Jouni Isoaho.
    High-Performance Long NoC Link Using Delay-Insensitive Current-Mode Signaling.
    VLSI Design 2007, Volume 2007 (0) 2007
    Journal article
    Teijo Lehtonen, Pasi Liljeberg, Juha Plosila.
    Online Reconfigurable Self-Timed Links for Fault Tolerant NoC.
    VLSI Design 2007, Volume 2007 (0) 2007
    Conference paper
    Teijo Lehtonen, Pasi Liljeberg, Juha Plosila.
    Fault Tolerance Analysis of NoC Architectures.
    International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA 2007 (0) 2007
    Conference paper
    Teijo Lehtonen, Pekka Rantala, P. Isomaki, Juha Plosila, Jouni Isoaho.
    An approach for analysing and improving fault tolerance in radio architectures.
    International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece 2006 (0) 2006
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    Your query returned 7 matches in the database.