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    Author information
    First name: Jonathan
    Last name: Chang
    DBLP: 58/4475
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    Below you find the publications which have been written by this author.

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    Conference paper
    Michael Clinton, Hank Cheng, H. J. Liao, Robin Lee, Ching-Wei Wu, Johnny Yang, Hau-Tai Hsieh, Frank Wu, Jung-Ping Yang, Atul Katoch, Arun Achyuthan, Donald Mikan, Bryan Sheffield, Jonathan Chang.
    12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications.
    2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017 2017 (0) 2017
    Conference paper
    Jonathan Chang, Yen-Huei Chen, Wei-Min Chan, Sahil Preet Singh, Hank Cheng, Hidehiro Fujiwara, Jih-Yu Lin, Kao-Cheng Lin, John Hung, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Quincy Li, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu.
    12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications.
    2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017 2017 (0) 2017
    Conference paper
    Martin Brox, Jonathan Chang, Howard Luong, Paul Liang, Riccardo Mariani.
    EE5: When will we stop driving our cars?
    2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017 2017 (0) 2017
    Conference paper
    Jonathan Chang, Stefan Scherer.
    Learning Representations of Emotional Speech with Deep Convolutional Generative Adversarial Networks.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Jonathan Chang, Stefan Scherer.
    Learning representations of emotional speech with deep convolutional generative adversarial networks.
    2017 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2017, New Orleans, LA, USA, March 5-9, 2017 2017 (0) 2017
    Journal article
    Deepayan Chakrabarti, Stanislav Funiak, Jonathan Chang, Sofus A. Macskassy.
    Joint Label Inference in Networks.
    Journal of Machine Learning Research 2017, Volume 18 (0) 2017
    Conference paper
    Yen-Huei Chen, Kao-Cheng Lin, Ching-Wei Wu, Wei-Min Chan, Jhon-Jhy Liaw, Hung-Jen Liao, Jonathan Chang.
    A 16nm dual-port SRAM with partial suppressed word-line, dummy read recovery and negative bit-line circuitries for low VMIN applications.
    2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016 2016 (0) 2016
    Conference paper
    Hidehiro Fujiwara, Yen-Huei Chen, Chih-Yu Lin, Wei-Cheng Wu, Dar Sun, Shin-Rung Wu, Hung-Jen Liao, Jonathan Chang.
    A 64-Kb 0.37V 28nm 10T-SRAM with mixed-Vth read-port and boosted WL scheme for IoT applications.
    IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016 2016 (0) 2016
    Journal article
    Vivek De, Stephen Kosonocky, Jonathan Chang, Yogesh K. Ramadass, David Stoppa.
    Highlights of the IEEE ISSCC 2014 Processors, Digital, Memory, Biomedical Next-Generation Systems Technologies, and Imagers, MEMS, Medical Displays Sessions.
    J. Solid-State Circuits 2015, Volume 50 (0) 2015
    Journal article
    Yen-Huei Chen, Wei-Min Chan, Wei-Cheng Wu, Hung-Jen Liao, Kuo-Hua Pan, Jhon-Jhy Liaw, Tang-Hsuan Chung, Quincy Li, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu, Jonathan Chang.
    A 16 nm 128 Mb SRAM in High- $\kappa$ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.
    J. Solid-State Circuits 2015, Volume 50 (0) 2015
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