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    Author information
    First name: Dajiang
    Last name: Zhou
    DBLP: 79/3501
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    Conference paper
    Dajiang Zhou, Shihao Wang, Heming Sun, Jian-Bin Zhou, Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, Satoshi Goto.
    An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design.
    J. Solid-State Circuits 2017, Volume 52 (0) 2017
    Conference paper
    Shihao Wang, Dajiang Zhou, Jian-Bin Zhou, Takeshi Yoshimura, Satoshi Goto.
    VLSI Implementation of HEVC Motion Compensation With Distance Biased Direct Cache Mapping for 8K UHDTV Applications.
    IEEE Trans. Circuits Syst. Video Techn. 2017, Volume 27 (0) 2017
    Journal article
    Zhengxue Cheng, Heming Sun, Dajiang Zhou, Shinji Kimura.
    Accelerating HEVC Inter Prediction with Improved Merge Mode Handling.
    IEICE Transactions 2017, Volume 100 (0) 2017
    Conference paper
    Jinjia Zhou, Dajiang Zhou, Satoshi Goto.
    100x Evolution of Video Codec Chips.
    Proceedings of the 2017 ACM on International Symposium on Physical Design, ISDP 2017, Portland, OR, USA, March 19-22, 2017 2017 (0) 2017
    Conference paper
    Xushen Han, Dajiang Zhou, Shihao Wang, Shinji Kimura.
    CNN-MERP: An FPGA-Based Memory-Efficient Reconfigurable Processor for Forward and Backward Propagation of Convolutional Neural Networks.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Shihao Wang, Dajiang Zhou, Xushen Han, Takeshi Yoshimura.
    Chain-NN: An Energy-Efficient 1D Chain Architecture for Accelerating Deep Convolutional Neural Networks.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Shihao Wang, Dajiang Zhou, Xushen Han, Takeshi Yoshimura.
    Chain-NN: An energy-efficient 1D chain architecture for accelerating deep convolutional neural networks.
    Design, Automation Test in Europe Conference Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 2017 (0) 2017
    Conference paper
    Jian-Bin Zhou, Dajiang Zhou, Shihao Wang, Shuping Zhang, Takeshi Yoshimura, Satoshi Goto.
    A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding.
    IEEE Trans. VLSI Syst. 2017, Volume 25 (0) 2017
    Journal article
    Shuping Zhang, Jinjia Zhou, Dajiang Zhou, Shinji Kimura, Satoshi Goto.
    A 7-Die 3D Stacked 3840×2160@120 fps Motion Estimation Processor.
    IEICE Transactions 2017, Volume 100 (0) 2017
    Conference paper
    Jian-Bin Zhou, Dajiang Zhou, Takeshi Yoshimura, Satoshi Goto.
    Approximate-DCT-derived measurement matrices for compressed sensing.
    IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017 2017 (0) 2017
    Show item 1 to 10 of 96  

    Your query returned 96 matches in the database.