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    Author information
    First name: Yiran
    Last name: Chen
    DBLP: 80/1641
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    Conference paper
    Qiang Feng, Xiong Bi, Xiujie Zhao, Yiran Chen, Bo Sun.
    Heuristic hybrid game approach for fleet condition-based maintenance planning.
    Rel. Eng. Sys. Safety 2017, Volume 157 (0) 2017
    Conference paper
    Hai Helen Li, Yiran Chen, Chenchen Liu, John Paul Strachan, Noraica Davila.
    Looking Ahead for Resistive Memory Technology: A broad perspective on ReRAM technology for future storage and computing.
    IEEE Consumer Electronics Magazine 2017, Volume 6 (0) 2017
    Conference paper
    Xiu-Li Chai, Zhihua Gan, Yiran Chen, Yushu Zhang.
    A visually secure image encryption scheme based on compressive sensing.
    Signal Processing 2017, Volume 134 (0) 2017
    Conference paper
    Xiu-Li Chai, Zhihua Gan, Kang Yang, Yiran Chen, Xianxing Liu.
    An image encryption algorithm based on the memristive hyperchaotic system, cellular automata and DNA sequence operations.
    Sig. Proc.: Image Comm. 2017, Volume 52 (0) 2017
    Conference paper
    Shunti Yin, Deepak Kadetotad, Bonan Yan, Chang Song, Yiran Chen, Chaitali Chakrabarti, Jae-sun Seo.
    Low-power neuromorphic speech recognition engine with coarse-grain sparsity.
    22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 2017 (0) 2017
    Conference paper
    Chuhan Min, Jie Guo, Hai Li, Yiran Chen.
    Extending the lifetime of object-based NAND flash device with STT-RAM/DRAM hybrid buffer.
    22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017 2017 (0) 2017
    Conference paper
    Jie Guo, Danghui Wang, Zili Shao, Yiran Chen.
    Data-Pattern-Aware Error Prevention Technique to Improve System Reliability.
    IEEE Trans. VLSI Syst. 2017, Volume 25 (0) 2017
    Conference paper
    Chunpeng Wu, Wei Wen, Tariq Afzal, Yongmei Zhang, Yiran Chen, Hai Li.
    A Compact DNN: Approaching GoogLeNet-Level Accuracy of Classification and Domain Adaptation.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Wei Wen, Cong Xu, Chunpeng Wu, Yandan Wang, Yiran Chen, Hai Li.
    Coordinating Filters for Faster Deep Neural Networks.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Yiran Chen, Hai Helen Li, Ismail Bayram, Enes Eken.
    Recent Technology Advances of Emerging Memories.
    IEEE Design Test 2017, Volume 34 (0) 2017
    Conference paper
    Yiran Chen, Tei-Wei Kuo, Barbara De Salvo.
    Guest Editors' Introduction: Critical and Enabling Techniques for Emerging Memories.
    IEEE Design Test 2017, Volume 34 (0) 2017
    Conference paper
    Linghao Song, Xuehai Qian, Hai Helen Li, Yiran Chen.
    PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning.
    2017 IEEE International Symposium on High Performance Computer Architecture, HPCA 2017, Austin, TX, USA, February 4-8, 2017 2017 (0) 2017
    Conference paper
    Amr M. Hassan, Chaofei Yang, Chenchen Liu, Hai Helen Li, Yiran Chen.
    Hybrid spiking-based multi-layered self-learning neuromorphic system based on memristor crossbar arrays.
    Design, Automation Test in Europe Conference Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 2017 (0) 2017
    Conference paper
    Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang, Li Jiang.
    Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar.
    Design, Automation Test in Europe Conference Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 2017 (0) 2017
    Conference paper
    Hsin-Pai Cheng, Wei Wen, Chunpeng Wu, Sicheng Li, Hai Helen Li, Yiran Chen.
    Understanding the design of IBM neurosynaptic system and its tradeoffs: A user perspective.
    Design, Automation Test in Europe Conference Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 2017 (0) 2017
    Conference paper
    Jiachen Mao, Xiang Chen, Kent W. Nixon, Christopher Krieger, Yiran Chen.
    MoDNN: Local distributed mobile computing system for Deep Neural Network.
    Design, Automation Test in Europe Conference Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 2017 (0) 2017
    Conference paper
    Xunchao Chen, Navid Khoshavi, Ronald F. DeMara, Jun Wang, Dan Huang, Wujie Wen, Yiran Chen.
    Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache.
    IEEE Trans. Computers 2017, Volume 66 (0) 2017
    Conference paper
    Wei Wen, Cong Xu, Feng Yan, Chunpeng Wu, Yandan Wang, Yiran Chen, Hai Li.
    TernGrad: Ternary Gradients to Reduce Communication in Distributed Deep Learning.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Chang Song, Hsin-Pai Cheng, Chunpeng Wu, Hai Li, Yiran Chen, Qing Wu.
    A Multi-strength Adversarial Training Method to Mitigate Adversarial Attacks.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Chaofei Yang, Qing Wu, Hai Li, Yiran Chen.
    Generative Poisoning Attack Method Against Neural Networks.
    CoRR 2017, Volume 0 (0) 2017
    Conference paper
    Peijian Zhang, Chuandong Li, Tingwen Huang, Ling Chen, Yiran Chen.
    Forgetting memristor based neuromorphic system for pattern training and recognition.
    Neurocomputing 2017, Volume 222 (0) 2017
    Conference paper
    Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, Jingtong Hu.
    A lightweight progress maximization scheduler for non-volatile processor under unstable energy harvesting.
    Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2017, Barcelona, Spain, June 21-22, 2017 2017 (0) 2017
    Conference paper
    Yaojun Zhang, Bonan Yan, Xiaobin Wang, Yiran Chen.
    Persistent and Nonpersistent Error Optimization for STT-RAM Cell Design.
    IEEE Trans. on CAD of Integrated Circuits and Systems 2017, Volume 36 (0) 2017
    Conference paper
    Jie Guo, Wujie Wen, Jingtong Hu, Danghui Wang, Hai Helen Li, Yiran Chen.
    FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.
    IEEE Trans. on CAD of Integrated Circuits and Systems 2017, Volume 36 (0) 2017
    Conference paper
    Sicheng Li, Wei Wen, Yu Wang, Song Han, Yiran Chen, Hai Li.
    An FPGA Design Framework for CNN Sparsification and Acceleration.
    25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2017, Napa, CA, USA, April 30 - May 2, 2017 2017 (0) 2017
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    Your query returned 227 matches in the database.