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First name:	Jordi
Last name:	Carrabina
DBLP:	c/JordiCarrabina
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	Conference paper Francis Calmon, M. Fathallah, P. J. Viverge, Christian Gontrand, Jordi Carrabina, P. Foussier. FPGA and Mixed FPGA-DSP Implementations of Electrical Drive Algorithms.	Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings 2002	(0)	2002
	Conference paper Lluis Ribas, Jordi Carrabina. Digital MOS Circuit Partitioning with Symbolic Modeling.	1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany 1999	(0)	1999
	Conference paper Lluis Ribas, Jordi Carrabina. On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits.	1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France 1998	(0)	1998
	Conference paper Ferran Lisa-Mingo, Jordi Carrabina. A Library of Memory Controllers for an Image Processing Prototyping System.	International Workshop on Rapid System Prototyping 1998	(0)	1998
	Conference paper Ferran Lisa, Faustino Cuadrado, Dolores Rexachs, Jordi Carrabina. A reconfigurable coprocessor for a PCI-based real time computer vision system.	Field-Programmable Logic and Applications, 7th International Workshop, FPL '97, London, UK, September 1-3, 1997, Proceedings 1997	(0)	1997
	Conference paper Jordi Riera, Lluis Ribas, A. Josep Velasco, Jordi Carrabina. Deriving cost functions from cell libraries and real ICs to allow real area-power-delay trade-off in early stages of logic synthesis.	Journal of Systems Architecture 1997, Volume 43	(0)	1997
	Conference paper Lluis Ribas, Jordi Carrabina. Analysis of Switch-Level Faults by Symbolic Simulation.	DAC 1995	(0)	1995
	Conference paper Lluis Ribas, Jordi Carrabina. Symbolic Analysis for Fault Detection in Switch-Level Circuits.	ISCAS 1995	(0)	1995
	Conference paper Rafael Peset Llopis, Lluis Ribas, Jordi Carrabina. Short Destabilizing Paths in Timing Verification.	Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer Processors, ICCD '94, Cambridge, MA, USA, October 10-12, 1994 1994	(0)	1994
	Conference paper Jordi Carrabina, Ferran Lisa, Vicens Gaitan, Lluís Garrido, Elena Valderrama. Hardware Implementation of a Neural Network for High Energy Physics Application.	New Trends in Neural Computation, International Workshop on Artificial Neural Networks, IWANN '93, Sitges, Spain, June 9-11, 1993, Proceedings 1993	(0)	1993

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