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    Author information
    First name: Chittaranjan A.
    Last name: Mandal
    DBLP: m/ChittaranjanAMandal
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    Below you find the publications which have been written by this author.

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    Conference paper
    Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal.
    Deriving bisimulation relations from path based equivalence checkers.
    Formal Asp. Comput. 2017, Volume 29 (0) 2017
    Journal article
    Jasaswi Prasad Mohanty, Chittaranjan A. Mandal, Chris Reade.
    Distributed construction of minimum Connected Dominating Set in wireless sensor network using two-hop information.
    Computer Networks 2017, Volume 123 (0) 2017
    Conference paper
    Soumyadip Bandyopadhyay, Santonu Sarkar, Dipankar Sarkar, Chittaranjan A. Mandal.
    SamaTulyata: An Efficient Path Based Equivalence Checking Tool.
    Automated Technology for Verification and Analysis - 15th International Symposium, ATVA 2017, Pune, India, October 3-6, 2017, Proceedings 2017 (0) 2017
    Conference paper
    Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar.
    An Equivalence Checking Framework for Array-Intensive Programs.
    Automated Technology for Verification and Analysis - 15th International Symposium, ATVA 2017, Pune, India, October 3-6, 2017, Proceedings 2017 (0) 2017
    Conference paper
    Soumyadip Bandyopadhyay, Dipankar Sarkar, Chittaranjan A. Mandal.
    An efficient path based equivalence checking for Petri net based models of programs.
    Proceedings of the 9th India Software Engineering Conference, Goa, India, February 18-20, 2016 2016 (0) 2016
    Journal article
    Jasaswi Prasad Mohanty, Chittaranjan A. Mandal, Chris Reade, Ariyam Das.
    Construction of minimum connected dominating set in wireless sensor networks using pseudo dominating set.
    Ad Hoc Networks 2016, Volume 42 (0) 2016
    Conference paper
    Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal.
    A Novel EPE Aware Hybrid Global Route Planner after Floorplanning.
    29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016 2016 (0) 2016
    Conference paper
    Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar.
    Translation validation of loop and arithmetic transformations in the presence of recurrences.
    Proceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems, LCTES 2016, Santa Barbara, CA, USA, June 13 - 14, 2016 2016 (0) 2016
    Conference paper
    Soumyadip Bandyopadhyay, Dipankar Sarkar, Chittaranjan A. Mandal, Kunal Banerjee, Krishnam Raju Duddu.
    A Path Construction Algorithm for Translation Validation Using PRES+ Models.
    Parallel Processing Letters 2016, Volume 26 (0) 2016
    Conference paper
    Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal.
    An early global routing framework for uniform wire distribution in SoCs.
    29th IEEE International System-on-Chip Conference, SOCC 2016, Seattle, WA, USA, September 6-9, 2016 2016 (0) 2016
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